The 8254 Tinier I Counter Chip
The Intel (NEC) 8254 contains three independent, programmable, multi-mode 16 bit counter/timers. The three independent 16 bit counters can be clocked at rates from DC to 5 MHz. Each counter can be individually programmed with 6 different operating modes by appropriately formatted control words. The most commonly uses for the 8254 in microprocessor based system are:
· programmable baud rate generator
· event counter
· binary rate multiplier
· real-time clock
· digital one-shot
· motor control
For more information about the 8254 , please refer to the NEC Microprocessors and peripherals or Intel Microsystems Components Handbook.
Pacer Trigger Source
The counter 1 and counter 2 are cascaded together to generate the timer pacer trigger of A/D conversion. The frequency of the pacer trigger is software controllable. The maximum pacer signal rate is 2MHz/4=500K which excess the maximum A/D conversion rate of the ACL-8112. The minimum signal rate is 2MHz/65535/65535, which is a very slow frequency that user may never use it.
General Purpose Timer / Counter
The counter 0 is free for users' applications. The clock source, gate control signal and the output signal is send to the connector CN3. The general purpose timer / counter can be used as event counter, or used for measuring frequency, or others functions. See the 'Timer/Counter Applications' section for examples.
I/O Address
The 8254 in the DAS BOARD occupies 4 I/O address as shown below.
| BASE + 0 | LSB OR MSB OF COUNTER 0 |
| BASE + 1 | LSB OR MSB OF COUNTER 1 |
| BASE + 2 | LSB OR MSB OF COUNTER 2 |
| BASE + 3 | CONTROL BYTE |
The programming of 8254 is control by the registers BASE+0 to BASE+3. The functionality of each register is specified this section For more detailed information, please refer handbook of 8254 chip.
Control Byte
Before loading or reading any of these individual counters, the control byte (BASE+3) must be loaded first. The format of the control byte is:
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| SC1 | SCO | RL1 | RLO | M2 | M1 | MO | BCD |
SC1 & SCO - Select Counter ( Bit7 & Bit 6)
| SC1 | SCO | COUNTER |
| 0 | 0 | Select Counter 0 |
| 0 | 1 | Select Counter 1 |
| 1 | 0 | Select Counter 2 |
| 1 | 1 | ILLEGAL |
RL1 & RLO - Select Read/Load operation ( Bit 5 & Bit 4)
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| RL1 | RLO | OPERATION |
| 0 | 0 | COUNTER LATCH FOR STABLE READ |
| 0 | 1 | READ/LOAD LSB ONLY |
| 1 | 0 | READ/LOAD MSB ONLY |
| 1 | 1 | READ/LOAD LSB FIRST, THEN MSB |
M2, M1 & MO - Select Operatinq Mode ( Bit 3, Bit 2, & Bit 1)
| M2 | M1 | MO | MODE |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| X | 1 | 0 | 2 |
| X | 1 | 1 | 3 |
| 1 | 0 | 0 | 4 |
| 1 | 0 | 1 | 5 |
BCD - Select Binary/BCD Countina ( Bit 0)
| 0 | 16-BITS BINARY COUNTER |
| 1 | BINARY CODED DECIMAL (BCD) COUNTER (4 DIGITAL) |
Note The count of the binary counter is from 0 up to 65,535 and the count of the BCD counter is from 0 up to 9,999.
In 8254, six operating modes can be selected, they are:
· Mode Definitions
· Mode 0 Interrupt on Terminal Count
· Mode 1 Programmable One-Shot.
· Mode 2 Rate Generator.
· Mode 3 Square Wave Rate Generator.
· Mode 4 Software Triggered Strobe.
· Mode 5 Hardware Triggered Strobe.
All detailed description of these six modes are written in Intel Microsystems Components Handbook Volume II Peripherals.
Выдержка из документации на адаптер аналогового вывода А626.
Programming
I/O Register
A-626 I/O Port Address
| Address | Function | Read/Write |
| Base + 0x0 | D/A CH0 High Byte | Write |
| Base + 0x1 | D/A CH0 Low Byte | Write |
| Base + 0x2 | D/A CH1 High Byte | Write |
| Base + 0x3 | D/A CH1 Low Byte | Write |
| Base + 0x4 | D/A CH2 High Byte | Write |
| Base + 0x5 | D/A CH2 Low Byte | Write |
| Base + 0x6 | D/A CH3 High Byte | Write |
| Base + 0x7 | D/A CH3 Low Byte | Write |
| Base + 0x8 | D/A CH4 High Byte | Write |
| Base + 0x9 | D/A CH4 Low Byte | Write |
| Base + OxA | D/A CH5 High Byte | Write |
| Base + OxB | D/A CH5 Low Byte | Write |
| Base + OxC | D/O Bit 0 - 7 | Write/ Read |
| Base + OxD | D/O Bit 8 - 15 | Write/ Read |
A-626 D/A Register
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| D/A Channel | High Byte Address | Low Byte Address |
| 0 | Base + 0 | Base + 1 |
| 1 | Base + 2 | Base + 3 |
| 2 | Base + 4 | Base + 5 |
| 3 | Base + 6 | Base + 7 |
| 4 | Base + 8 | Base + 9 |
| 5 | Base + A | Base + В |
Data Register
12-bit D/A Data Format:
| D/A Low Byte | |||||||
| Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit3 | Bit 2 | Bitl | Bit0 |
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| D/A High Byte | |||||||
| Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit3 | Bit 2 | Bitl | Bit0 |
| X | X | X | X | D11 | D10 | D9 | D8 |
Note: You should be write the high byte data first then write low byte data
| Output Range | Output Voltage | Binary Code | Hex. | Dec. | ||
| 0-5V (Unipolar) | 5V | 1111 1111 1111 | FFF | 4095 | ||
| 2.5V | 1000 0000 0000 | 800 | 2048 | |||
| 0V | 0000 0000 0000 | 0 | 0 | |||
| 0-10V (Unipolar) | 10V | 1111 1111 1111 | FFF | 4095 | ||
| 5V | 1000 0000 0000 | 800 | 2048 | |||
| 0V | 0000 0000 0000 | 0 | 0 | |||
| ±5V (Bipolar) | 5V | 1111 1111 1111 | FFF | 4095 | ||
| 0V | 1000 0000 0000 | 800 | 2048 | |||
| -5V | 0000 0000 0000 | 0 | 0 | |||
| ±10V (Bipolar) | 10V | 1111 1111 1111 | FFF | 4095 | ||
| 0V | 1000 0000 0000 | 800 | 2048 | |||
| -10V | 0000 0000 0000 | 0 | 0 | |||
| 4~20mA
(Current Loop) | 20mA | 1111 1111 1111 | FFF | 4095 | ||
| 12mA | 1000 0000 0000 | 800 | 2048 | |||
| 4mA | 0000 0000 0000 | 0 | 0 |
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