A/D Operation Mode Control Register

The A/D operation includes the analog signal conversion and the data transformation. This register controls the internal trigger mode and data transformation method. It is initialized as software trigger and program polling transfer when your PC is reset or power on. The details of the A/D operation are illustrated in Chapter 5. There are four operation modes shown as following:

Bit	7	6	5	4	3	2	1	0
BASE+11	X	X	X	X	X	S2	S1	S0

Address : BASE+11

Attribute : write only

Data Format:

S2	S1	S0	Operation Mode Description
0	0	0	Internal trigger is disable
0	0	1	software trigger and program polling (default)
0	1	0	timer pacer trigger and DMA transfer
1	1-	0	timer pacer trigger and interrupt transfer.

Note:

1. When your system power on or reset, the A/D operation will be initialized as " software trigger and program polling" mode.

2. No matter which mode is selected, the external trigger is available if the JP4 is set to be external trigger.

3. As long as not the DMA mode is not used, the program polling is always possible. The synchronization of A/D conversion and data transfer should be concerned when use program polling.

4. The interrupt will be occurred after end of conversion if the "timer pacer trigger and interrupt transfer" mode is selected. If you want to use pacer trigger and interrupt transfer mode, please enable the IRQ level.

Interrupt Status Register

The Interrupt Status Register is used to clear the interrupt status for next new interrupt can be generated. If the DAS BOARD is in interrupt data transfer mode, a hardware status flag will be set after each A/D conversion. You have to clear the status flag by just writing any data to this register, let the DAS BOARD can generate next interrupt if a new A/D conversion is happen.

Bit	7	6	5	4	3	2	1	0
BASE+8	X	X	X	X	X	X	X	X

Address : BASE + 8

Attribute : write only

Data Format:

Software Trigger Register

If you want to generate a trigger pulse to the DAS BOARD for A/D conversion, you just write any data to this register, and then the A/D converter will be triggered.

Bit	7	6	5	4	3	2	1	0
BASE+12	X	X	X	X	X	X	X	X

Address : BASE+12

Attribute : write only

Data Format:

Digital I/O register

There are 16 digital input channels and 16 digital output channels are provided by the ACL-8112. The address Base + 6 and Base + 7 are used for digital input channels, and the address Base + 13 and Base + 14 are used for digital output channels.

Bit	7	6	5	4	3	2	1	0
Base + 6	DI7	DI6	DI5	DI4	DI3	DI2	DI1	DI0
Base + 7	DI15	DI14	DI13	DI12	DI11	DI10	DI9	DI8

Address : BASE + 6 & BASE + 7

Attribute : read only

Data Format:

Bit	7	6	5	4	3	2	1	0
Base+13	DO7	DO6	DO5	DO4	DO3	DO2	DO1	DO0
Base +14	DO15	DO14	DO13	DO12	DO11	DO10	DO9	DO8

Address : BASE + 13 & BASE + 14

Attribute : write only

Data Format:

D/A Output Register

The D/A converter will convert the D/A output register data to the analog signal. The register data of the address Base + 4 and Base + 5 are used for D/A channel 1, Base +6 and Base +7 are used for D/A channel 2.

Bit	7	6	5	4	3	2	1	0
Base + 4	DA7	DA6	DA5	DA4	DA3	DA2	DA1	DA0
Base + 5	X	X	X	X	DA11	DA10	DA9	DA8

Address : BASE + 4 & BASE + 5

Attribute: write only

Data Format: (for D/A Channel 1)

 

Bit	7	6	5	4	3	2	1	0
Base + 6	DA7	DA6	DA5	DA4	DA3	DA2	DA1	DA0
Base + 7	X	X	X	X	DA11	DA10	DA9	DA8

 

Address : BASE + 6 & BASE + 7

Attribute : write only

Data Format: (for D/A Channel 2)

DA0 is the LSB and DA11 is the MSB of the 12 bits data.

X : don't care

Note : The D/A registers are"double buffered" so that the D/A analog output signals will not updated until the second(high) byte is written. This can insure a single step transition when the D/A conversion.

Internal Timer/Counter Register

Base + 0	Counter 0 Register ( R/W)
Base + 1	Counter 1 Register ( R/W)
Base + 2	Counter 2 Register ( R/W)
Base + 3	8254 CONTROL BYTE

Two counters of 8254 are used for periodically triggering the A/D conversion; the left one is left free for user applications. The 8254 occupies 4 I/O address locations in the DAS BOARD as shown blow. Users can refer to NEC's or Intel's data sheet for a full description of the 8254 features, condensed information is specified in Appendix B.

Address : BASE + 0 ~ BASE + 3

Attribute : read / write

Data Format:

 

Low-level Programming

To operate the ACL-8112, users should understand how to write a hardware dependent low-level program. Using either the assembly or the high-level language can perform the low-level programming. In Appendix B, the low-level programming syntax is introduced.

Operation Theorem

The operation theorem of the functions on DAS BOARD card is described in this chapter. The functions include the A/D conversion, D/A conversion, digital I/O and counter / timer. The operation theorem can help you to understand how to manipulate or to program the ACL-8112.

A/D Conversion

Before programming the DAS BOARD to perform the A/D conversion, you should understand the following issues:

· • A/D conversion procedure

· • A/D trigger mode

· • A/D data transfer mode

· • Signal Connection

A/D Conversion Procedure

The A/D conversion is starting by a trigger source, then the A/D converter will start to convert the signal to a digital value. The DAS BOARD provides three trigger modes, see section 5.1.2.

While A/D conversion, the DRDY bit in A/D data register is cleared to indicate the data is not ready. After conversion being completed, the DRDY bit will return to high (1) level. It means users can read the converted data from the A/D data registers. Please refer section 4.2 for the A/D data format.

The A/D data should be transferred into PC's memory for further using. The DAS BOARD provides three data transfer modes that allow users to optimize the DAS system. Refer to section 5.1.3 for data transfer modes.

 

A/D Trigger Modes

In the ACL-8112, A/D conversion can be triggered by the Internal or External trigger source. The jumper JP5 is used to select the internal or external trigger, please refer to section 2.8 for details. Whenever the external source is set, the internal sources are disable.

The two internal sources are the software trigger and the timer pacer trigger which is controlled by the A/D operation mode control register (BASE+11). Total three trigger sources are possible in the ACL-8112. The different trigger conditions are specified as follows:

Software trigger

The trigger source is software controllable in this mode. That is, the A/D conversion is starting when any value is written into the software trigger register (BASE+12). This trigger mode is suitable for low speed A/D conversion. Under this mode, the timing of the A/D conversion is fully controlled under software. However, it is difficult to control the fixed A/D conversion rate except another timer interrupt service routine is used to generate a fixed rate trigger.

Timer Pacer Trigger

An on-board timer / counter chip 8254 is used to provide a trigger source for A/D conversion at a fixed rate. Two counters of the 8254 chip are cascaded together to generate trigger pulse with precise period. Please refer to section 5.4 for 8254 architecture. This mode is ideal for high speed A/D conversion. It can be combined with the DMA or the interrupt data transfer. It's recommend to use this mode if your applications need a fixed and precise A/D sampling rate.

External Trigger

Through the pin-17 of CN3 (ExtTrig), the A/D conversion also can be performed when the a rising edge of external signal is occurred.

The conversion rate of this mode is more flexible than the previous two modes, because the users can handle the external signal by outside device. The external trigger can combine with the DMA transfer, interrupt data transfer, or even program polling data transfer. Generally, the interrupt data transfer is often used when external trigger mode is used.

A/D Data Transfer Modes

On the ACL-8112, three A/D data transfer modes can be used when the conversion is completed. The data transfer mode is controlled by the mode control register (BASE+11). The different transfer modes are specified as follows:

Software Data Transfer

Usually, this mode is used with software A/D trigger mode. After the A/D conversion is triggered by software, the software should poll the DRDY bit until it becomes to high level. Whenever the low byte of A/D data is read, the DRDY bit will be cleared to indicate the data is read out.

It is possible to read A/D converted data without polling. The A/D conversion time will not excess 8h.s on DAS BOARD card. Hence, after software trigger, the software can wait for at least 8^s then read the A/D register without polling.

D/A Conversion

The operation of D/A conversion is more simple than A/D operation. You only need to write digital values into the D/A data registers and the corresponding voltage will be output from the A01 or A02. Refer to section 4.9 for information about the D/A data registers. The mathematical relationship between the digital number DAn and the output voltage is formulated as following:

N

DAn Vout = -Vref x ———

4096

where the Vref'\s the reference voltage, the Vout is the output voltage, and the DAn is the digital value in D/A data registers.

Before performing the D/A conversion, users should care about the D/A reference voltage which set by the JP1 ,JP2 and JP3. Please refer section 2.11 for jumper setting. The reference voltage will effect the output voltage. If the reference voltage is -5V, the D/A output scaling will be 0~5V. If the reference voltage is -10V, the D/A output scaling will be 0-10V.

Note that the D/A registers are "double buffered", so that the D/A analog output signals will not be updated until the high byte is written. When write 12 bits data to D/A registers of the ACL-8112, the low byte must be written before the high byte. This procedure can insure a single step transition when the D/A conversion.

Digital Input and Output

To program digital I/O operation is fairly straightforward. The digital input operation is just to read data from the corresponding registers, and the digital output operation is to write data to the corresponding registers. The digital I/O registers' format are shown in section 4.9. Note that the DIO data channel can only be read or written in form of 8 bits together. It is impossible to access individual bit channel.

Timer/Counter Operation

The DAS BOARD has an interval timer/counter 8254 on board. Refer to section 3.5 for the signal connection and the configuration of the counters.

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